RP/0/RP0/CPU0:R1#show isis trace all | include UPD_LSP_SET_SRM | utility tail -n 60 Thu Sep 17 00:24:52.032 UTC Sep 17 00:23:05.834 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-10 Gi0/0/0/0 Sep 17 00:23:05.834 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-10 Sep 17 00:23:05.834 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-11 Gi0/0/0/0 Sep 17 00:23:05.834 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-11 Sep 17 00:23:05.834 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-12 Gi0/0/0/0 Sep 17 00:23:05.834 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-12 Sep 17 00:23:05.834 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-12 Gi0/0/0/0 Sep 17 00:23:05.834 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-12 Sep 17 00:23:05.834 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-11 Gi0/0/0/0 Sep 17 00:23:05.834 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-11 Sep 17 00:23:05.834 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-10 Gi0/0/0/0 Sep 17 00:23:05.834 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-10 Sep 17 00:23:05.834 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-0f Gi0/0/0/0 Sep 17 00:23:05.834 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-0f Sep 17 00:23:05.834 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-0e Gi0/0/0/0 Sep 17 00:23:05.834 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-0e Sep 17 00:23:05.834 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-0d Gi0/0/0/0 Sep 17 00:23:05.834 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-0d Sep 17 00:23:05.834 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-0c Gi0/0/0/0 Sep 17 00:23:05.834 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-0c Sep 17 00:23:05.834 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-0b Gi0/0/0/0 Sep 17 00:23:05.834 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-0b Sep 17 00:23:05.834 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-08 Gi0/0/0/0 Sep 17 00:23:05.834 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-08 Sep 17 00:23:05.834 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-07 Gi0/0/0/0 Sep 17 00:23:05.834 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-07 Sep 17 00:23:05.834 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-06 Gi0/0/0/0 Sep 17 00:23:05.834 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-06 Sep 17 00:23:05.834 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-05 Gi0/0/0/0 Sep 17 00:23:05.834 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-05 Sep 17 00:23:05.903 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-00 Gi0/0/0/0 Sep 17 00:23:05.903 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-00 Sep 17 00:23:05.903 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-01 Gi0/0/0/0 Sep 17 00:23:05.903 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-01 Sep 17 00:23:05.903 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-02 Gi0/0/0/0 Sep 17 00:23:05.903 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-02 Sep 17 00:23:05.903 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-03 Gi0/0/0/0 Sep 17 00:23:05.903 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-03 Sep 17 00:23:05.903 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-04 Gi0/0/0/0 Sep 17 00:23:05.903 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-04 Sep 17 00:23:05.903 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-09 Gi0/0/0/0 Sep 17 00:23:05.903 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-09 Sep 17 00:23:05.903 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-0a Gi0/0/0/0 Sep 17 00:23:05.903 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-0a Sep 17 00:23:05.903 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-32 Gi0/0/0/0 Sep 17 00:23:05.903 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-32 Sep 17 00:23:05.903 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-32 Gi0/0/0/0 Sep 17 00:23:05.903 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-32 Sep 17 00:23:05.903 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-0a Gi0/0/0/0 Sep 17 00:23:05.903 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-0a Sep 17 00:23:05.903 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-09 Gi0/0/0/0 Sep 17 00:23:05.903 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-09 Sep 17 00:23:05.904 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-04 Gi0/0/0/0 Sep 17 00:23:05.904 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-04 Sep 17 00:23:05.904 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-03 Gi0/0/0/0 Sep 17 00:23:05.904 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-03 Sep 17 00:23:05.904 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-02 Gi0/0/0/0 Sep 17 00:23:05.904 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-02 Sep 17 00:23:05.904 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-01 Gi0/0/0/0 Sep 17 00:23:05.904 isis/1/upd 0/RP0/CPU0 t4487 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: Timer L2 0010.0100.1001.00-01