RP/0/RP0/CPU0:R2#show isis trace all | include UPD_LSP_SET_SRM | utility tail -n 60 Thu Sep 17 00:25:16.101 UTC Sep 17 00:23:06.234 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-0a Gi0/0/0/1 Sep 17 00:23:06.234 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-0a Sep 17 00:23:06.234 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-0b Gi0/0/0/1 Sep 17 00:23:06.234 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-0b Sep 17 00:23:06.234 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-0c Gi0/0/0/1 Sep 17 00:23:06.234 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-0c Sep 17 00:23:06.234 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-0d Gi0/0/0/1 Sep 17 00:23:06.234 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-0d Sep 17 00:23:06.235 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-0e Gi0/0/0/1 Sep 17 00:23:06.235 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-0e Sep 17 00:23:06.235 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-0f Gi0/0/0/1 Sep 17 00:23:06.235 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-0f Sep 17 00:23:06.235 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-10 Gi0/0/0/1 Sep 17 00:23:06.235 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-10 Sep 17 00:23:06.619 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-11 Gi0/0/0/1 Sep 17 00:23:06.619 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-11 Sep 17 00:23:06.619 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-12 Gi0/0/0/1 Sep 17 00:23:06.619 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-12 Sep 17 00:23:06.620 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-13 Gi0/0/0/1 Sep 17 00:23:06.620 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-13 Sep 17 00:23:06.620 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-14 Gi0/0/0/1 Sep 17 00:23:06.620 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-14 Sep 17 00:23:06.620 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-15 Gi0/0/0/1 Sep 17 00:23:06.620 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-15 Sep 17 00:23:06.620 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-16 Gi0/0/0/1 Sep 17 00:23:06.620 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-16 Sep 17 00:23:06.620 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-17 Gi0/0/0/1 Sep 17 00:23:06.620 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-17 Sep 17 00:23:06.620 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-18 Gi0/0/0/1 Sep 17 00:23:06.620 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-18 Sep 17 00:23:06.620 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-19 Gi0/0/0/1 Sep 17 00:23:06.620 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-19 Sep 17 00:23:06.620 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-1a Gi0/0/0/1 Sep 17 00:23:06.620 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-1a Sep 17 00:23:06.952 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-1b Gi0/0/0/1 Sep 17 00:23:06.952 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-1b Sep 17 00:23:06.952 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-1c Gi0/0/0/1 Sep 17 00:23:06.952 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-1c Sep 17 00:23:06.952 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-1d Gi0/0/0/1 Sep 17 00:23:06.952 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-1d Sep 17 00:23:06.953 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-1e Gi0/0/0/1 Sep 17 00:23:06.953 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-1e Sep 17 00:23:06.953 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-1f Gi0/0/0/1 Sep 17 00:23:06.953 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-1f Sep 17 00:23:06.953 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-20 Gi0/0/0/1 Sep 17 00:23:06.953 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-20 Sep 17 00:23:06.953 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-21 Gi0/0/0/1 Sep 17 00:23:06.953 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-21 Sep 17 00:23:06.953 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-32 Gi0/0/0/1 Sep 17 00:23:06.953 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-32 Sep 17 00:23:06.953 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-00 Gi0/0/0/1 Sep 17 00:23:06.953 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-00 Sep 17 00:23:06.953 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-01 Gi0/0/0/1 Sep 17 00:23:06.953 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-01 Sep 17 00:23:07.323 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-02 Gi0/0/0/1 Sep 17 00:23:07.323 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-02 Sep 17 00:23:07.323 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-03 Gi0/0/0/1 Sep 17 00:23:07.323 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-03 Sep 17 00:23:07.323 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-04 Gi0/0/0/1 Sep 17 00:23:07.323 isis/1/upd 0/RP0/CPU0 t4503 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-04