RP/0/RP0/CPU0:R4#show isis trace all | include UPD_LSP_SET_SRM | utility tail -n 60 Wed Sep 16 23:48:23.655 UTC Sep 16 23:40:34.255 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-07 Sep 16 23:40:34.255 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-08 Sep 16 23:40:36.489 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-09 Sep 16 23:40:36.489 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-0a Sep 16 23:43:20.942 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0020.0200.2002.00-00 Sep 16 23:45:20.249 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-00 Sep 16 23:45:20.249 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-01 Sep 16 23:45:20.249 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-02 Sep 16 23:45:20.250 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-03 Sep 16 23:45:20.250 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-04 Sep 16 23:45:20.250 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-05 Sep 16 23:45:20.250 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-06 Sep 16 23:45:20.250 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-07 Sep 16 23:45:20.250 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-08 Sep 16 23:45:20.250 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-09 Sep 16 23:45:20.622 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-0a Sep 16 23:45:20.622 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-0b Sep 16 23:45:20.622 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-0c Sep 16 23:45:20.622 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-0d Sep 16 23:45:20.622 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-0e Sep 16 23:45:20.622 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-0f Sep 16 23:45:20.622 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-10 Sep 16 23:45:20.622 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-11 Sep 16 23:45:20.622 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-12 Sep 16 23:45:20.622 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-13 Sep 16 23:45:21.023 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-14 Sep 16 23:45:21.023 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-15 Sep 16 23:45:21.023 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-16 Sep 16 23:45:21.023 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-17 Sep 16 23:45:21.023 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-18 Sep 16 23:45:21.023 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-19 Sep 16 23:45:21.023 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-1a Sep 16 23:45:21.036 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-1b Sep 16 23:45:21.036 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-1c Sep 16 23:45:21.037 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-1d Sep 16 23:45:21.431 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-1e Sep 16 23:45:21.431 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-1f Sep 16 23:45:21.431 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-20 Sep 16 23:45:21.431 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-21 Sep 16 23:45:21.431 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-22 Sep 16 23:45:21.431 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-23 Sep 16 23:45:21.431 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-24 Sep 16 23:45:21.431 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-25 Sep 16 23:45:21.431 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-26 Sep 16 23:45:21.431 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-27 Sep 16 23:45:21.772 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-28 Sep 16 23:45:21.772 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-29 Sep 16 23:45:21.772 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-2a Sep 16 23:45:21.772 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-2b Sep 16 23:45:21.772 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-2c Sep 16 23:45:21.772 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-2d Sep 16 23:45:21.772 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-2e Sep 16 23:45:21.772 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-2f Sep 16 23:45:21.772 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-30 Sep 16 23:45:21.772 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-31 Sep 16 23:45:22.128 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0010.0100.1001.00-32 Sep 16 23:45:35.731 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0030.0300.3003.01-00 Sep 16 23:45:52.700 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1252 UPD_LSP_SET_SRM Upd Type: None L2 0040.0400.4004.00-00 Gi0/0/0/1 Sep 16 23:45:52.700 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: None L2 0040.0400.4004.00-00 Sep 16 23:45:57.018 isis/1/upd 0/RP0/CPU0 t4509 isis_upd_lsp_set_all_srm:1273 UPD_LSP_SET_SRM Upd Type: LSP L2 0030.0300.3003.00-00