RP/0/RP0/CPU0:R2#show clock
Sun Sep 20 10:10:03.424 UTC
10:10:03.467 UTC Sun Sep 20 2026
RP/0/RP0/CPU0:R2#logmsg informational STEP0-CLEAR: clear counters GigabitEthernet0/0/0/0
Sun Sep 20 10:10:03.560 UTC
RP/0/RP0/CPU0:R2#clear counters GigabitEthernet0/0/0/0
                                ^
% Invalid input detected at '^' marker.
RP/0/RP0/CPU0:R2#logmsg informational STEP0-CLEAR: clear counters GigabitEthernet0/0/0/1
Sun Sep 20 10:10:03.692 UTC
RP/0/RP0/CPU0:R2#clear counters GigabitEthernet0/0/0/1
                                ^
% Invalid input detected at '^' marker.
RP/0/RP0/CPU0:R2#show clock
Sun Sep 20 10:10:03.884 UTC
10:10:03.929 UTC Sun Sep 20 2026