RP/0/RP0/CPU0:R2#show clock
Sun Sep 20 11:21:53.617 UTC
11:21:53.713 UTC Sun Sep 20 2026
RP/0/RP0/CPU0:R2#logmsg informational STEP10-CLEAR: clear counters GigabitEthernet0/0/0/0
Sun Sep 20 11:21:53.822 UTC
RP/0/RP0/CPU0:R2#clear counters GigabitEthernet0/0/0/0
                                ^
% Invalid input detected at '^' marker.
RP/0/RP0/CPU0:R2#logmsg informational STEP10-CLEAR: clear counters GigabitEthernet0/0/0/1
Sun Sep 20 11:21:53.988 UTC
RP/0/RP0/CPU0:R2#clear counters GigabitEthernet0/0/0/1
                                ^
% Invalid input detected at '^' marker.
RP/0/RP0/CPU0:R2#show clock
Sun Sep 20 11:21:54.123 UTC
11:21:54.168 UTC Sun Sep 20 2026