RP/0/RP0/CPU0:R3#show clock
Sun Sep 20 10:25:06.219 UTC
10:25:06.259 UTC Sun Sep 20 2026
RP/0/RP0/CPU0:R3#logmsg informational STEP2-CLEAR: clear counters GigabitEthernet0/0/0/0
Sun Sep 20 10:25:06.348 UTC
RP/0/RP0/CPU0:R3#clear counters GigabitEthernet0/0/0/0
                                ^
% Invalid input detected at '^' marker.
RP/0/RP0/CPU0:R3#show clock
Sun Sep 20 10:25:06.545 UTC
10:25:06.585 UTC Sun Sep 20 2026