RP/0/RP0/CPU0:R1#show clock
Sun Sep 20 10:31:51.638 UTC
10:31:51.734 UTC Sun Sep 20 2026
RP/0/RP0/CPU0:R1#logmsg informational STEP3-CLEAR: clear counters GigabitEthernet0/0/0/0
Sun Sep 20 10:31:51.791 UTC
RP/0/RP0/CPU0:R1#clear counters GigabitEthernet0/0/0/0
                                ^
% Invalid input detected at '^' marker.
RP/0/RP0/CPU0:R1#show clock
Sun Sep 20 10:31:51.925 UTC
10:31:51.968 UTC Sun Sep 20 2026