RP/0/RP0/CPU0:R2#show clock
Sun Sep 20 10:31:55.522 UTC
10:31:55.561 UTC Sun Sep 20 2026
RP/0/RP0/CPU0:R2#logmsg informational STEP3-CLEAR: clear counters GigabitEthernet0/0/0/0
Sun Sep 20 10:31:55.716 UTC
RP/0/RP0/CPU0:R2#clear counters GigabitEthernet0/0/0/0
                                ^
% Invalid input detected at '^' marker.
RP/0/RP0/CPU0:R2#logmsg informational STEP3-CLEAR: clear counters GigabitEthernet0/0/0/1
Sun Sep 20 10:31:55.907 UTC
RP/0/RP0/CPU0:R2#clear counters GigabitEthernet0/0/0/1
                                ^
% Invalid input detected at '^' marker.
RP/0/RP0/CPU0:R2#show clock
Sun Sep 20 10:31:56.031 UTC
10:31:56.069 UTC Sun Sep 20 2026