RP/0/RP0/CPU0:R3#show clock
Sun Sep 20 10:41:20.047 UTC
10:41:20.148 UTC Sun Sep 20 2026
RP/0/RP0/CPU0:R3#logmsg informational STEP4-CLEAR: clear counters GigabitEthernet0/0/0/0
Sun Sep 20 10:41:20.277 UTC
RP/0/RP0/CPU0:R3#clear counters GigabitEthernet0/0/0/0
                                ^
% Invalid input detected at '^' marker.
RP/0/RP0/CPU0:R3#show clock
Sun Sep 20 10:41:20.425 UTC
10:41:20.463 UTC Sun Sep 20 2026