RP/0/RP0/CPU0:R2#show clock
Sun Sep 20 10:54:34.811 UTC
10:54:34.855 UTC Sun Sep 20 2026
RP/0/RP0/CPU0:R2#logmsg informational STEP6-CLEAR: clear counters GigabitEthernet0/0/0/0
Sun Sep 20 10:54:34.956 UTC
RP/0/RP0/CPU0:R2#clear counters GigabitEthernet0/0/0/0
                                ^
% Invalid input detected at '^' marker.
RP/0/RP0/CPU0:R2#logmsg informational STEP6-CLEAR: clear counters GigabitEthernet0/0/0/1
Sun Sep 20 10:54:35.191 UTC
RP/0/RP0/CPU0:R2#clear counters GigabitEthernet0/0/0/1
                                ^
% Invalid input detected at '^' marker.
RP/0/RP0/CPU0:R2#show clock
Sun Sep 20 10:54:35.335 UTC
10:54:35.419 UTC Sun Sep 20 2026