RP/0/RP0/CPU0:R1#show clock
Sun Sep 20 11:02:31.434 UTC
11:02:31.527 UTC Sun Sep 20 2026
RP/0/RP0/CPU0:R1#logmsg informational STEP7-CLEAR: clear counters GigabitEthernet0/0/0/0
Sun Sep 20 11:02:31.595 UTC
RP/0/RP0/CPU0:R1#clear counters GigabitEthernet0/0/0/0
                                ^
% Invalid input detected at '^' marker.
RP/0/RP0/CPU0:R1#show clock
Sun Sep 20 11:02:31.727 UTC
11:02:31.769 UTC Sun Sep 20 2026