RP/0/RP0/CPU0:R2#show clock
Sun Sep 20 11:02:35.322 UTC
11:02:35.425 UTC Sun Sep 20 2026
RP/0/RP0/CPU0:R2#logmsg informational STEP7-CLEAR: clear counters GigabitEthernet0/0/0/0
Sun Sep 20 11:02:35.519 UTC
RP/0/RP0/CPU0:R2#clear counters GigabitEthernet0/0/0/0
                                ^
% Invalid input detected at '^' marker.
RP/0/RP0/CPU0:R2#logmsg informational STEP7-CLEAR: clear counters GigabitEthernet0/0/0/1
Sun Sep 20 11:02:35.714 UTC
RP/0/RP0/CPU0:R2#clear counters GigabitEthernet0/0/0/1
                                ^
% Invalid input detected at '^' marker.
RP/0/RP0/CPU0:R2#show clock
Sun Sep 20 11:02:35.839 UTC
11:02:35.880 UTC Sun Sep 20 2026