RP/0/RP0/CPU0:R1#show clock
Sun Sep 20 11:15:49.041 UTC
11:15:49.126 UTC Sun Sep 20 2026
RP/0/RP0/CPU0:R1#logmsg informational STEP9-CLEAR: clear counters GigabitEthernet0/0/0/0
Sun Sep 20 11:15:49.240 UTC
RP/0/RP0/CPU0:R1#clear counters GigabitEthernet0/0/0/0
                                ^
% Invalid input detected at '^' marker.
RP/0/RP0/CPU0:R1#show clock
Sun Sep 20 11:15:49.424 UTC
11:15:49.463 UTC Sun Sep 20 2026