RP/0/RP0/CPU0:R2#show clock
Sun Sep 20 11:15:52.625 UTC
11:15:52.815 UTC Sun Sep 20 2026
RP/0/RP0/CPU0:R2#logmsg informational STEP9-CLEAR: clear counters GigabitEthernet0/0/0/0
Sun Sep 20 11:15:52.963 UTC
RP/0/RP0/CPU0:R2#clear counters GigabitEthernet0/0/0/0
                                ^
% Invalid input detected at '^' marker.
RP/0/RP0/CPU0:R2#logmsg informational STEP9-CLEAR: clear counters GigabitEthernet0/0/0/1
Sun Sep 20 11:15:53.118 UTC
RP/0/RP0/CPU0:R2#clear counters GigabitEthernet0/0/0/1
                                ^
% Invalid input detected at '^' marker.
RP/0/RP0/CPU0:R2#show clock
Sun Sep 20 11:15:53.288 UTC
11:15:53.341 UTC Sun Sep 20 2026